In mid-September 2026, Bloomberg and follow-on coverage such as TrendForce refreshed Meta’s custom-silicon map: MTIA 450, code-named Arke, and its successor MTIA 500, Astrid. The focus is not an Iris production announcement or the 14 GW capacity goal—stories already covered—but the concrete 2027 datacenter deployment calendar for inference chips.
Arke is in testing as a key third-generation MTIA part aimed at inference. Meta targets beginning datacenter deployment in the first half of 2027, with the stated aim of cutting cost and energy versus general-purpose commercial accelerators when serving models at scale.
Astrid, MTIA 500, would complete design on a weeks-scale horizon per those reports and enter datacenters toward late 2027, with broader deployment afterward. After Astrid, the roadmap emphasizes speed and throughput, with possible further gains from fiber-optic technologies.
Meta designs with Broadcom and manufactures with TSMC. TrendForce, citing Bloomberg, said twelve new chips arrived from TSMC on 1 September and initial performance landed within 2–3% of simulations; on day one the team reportedly ran Meta, DeepSeek, and Alibaba models on the processors.
Technical specs circulating for the MTIA line place Arke around 18.4 TB/s HBM bandwidth (double MTIA 400 in prior family accounts), 288 GB HBM, and module TDP near 1,400 W. Astrid would lift bandwidth another ~50% (toward 27.6 TB/s), with up to 384–512 GB HBM and higher MX4 performance, in a 2×2 chiplet design per technical coverage.
Neural Pulse insists on the editorial distinction: the Iris/MTIA and 14 GW expansion article covers capacity and campus strategy; this piece covers the Arke/Astrid pair and their 2027 inference calendar. Merging both into one slug distorts the archive.
The industrial thesis is workload segmentation. Meta—like Google with TPUs, AWS with Trainium/Inferentia, and Microsoft with Maia—shifts high-volume inference onto custom silicon and reserves Nvidia GPUs (and AMD deals) for frontier training and spikes. Engineering VP Yee Jiun Song has argued that at gigawatt-scale deployments a ~30% chip cost premium becomes hard to justify.
Meta reportedly cancelled Olympus, an earlier training-and-inference project, partly on cost. The pivot to HBM-heavy generalist inference reflects that lesson: not every accelerator must mimic a training GPU.
Reports mention a commitment of more than 1 GW of these chips over a 12-month period, with acceleration afterward. Neural Pulse treats that figure as a business-press-reported target, not independently audited installed capacity.
For Nvidia, the story is not “total replacement” but margin erosion on the inference tail. Frontier training remains GPU-cluster anchored; the 2027 fight is who bills production tokens for Llama and internal ranking/recommendation/assistant models.
Cloud customers and Meta advertisers will not see an immediate public SKU; they will see, if the roadmap holds, different internal costs and possibly more AI product capacity in apps. Competitiveness is measured in latency, energy, and dollars per million tokens—not the code name.
Risks include TSMC yields, software maturity (PyTorch/vLLM/Triton on MTIA), and model cadence outrunning custom silicon. An Arke slip into 2H27 would change the “2027 efficiency” narrative.
Neural Pulse closes without sovereignty hyperbole versus Nvidia: Meta diversifies inference. Arke and Astrid are the named bet—with H1 2027 and late-2027 dates—that the company and Bloomberg put on the table in September.
For the Neural Pulse archive, the correct slug is Arke/Astrid 2027, not Iris/14 GW: two chapters of the same silicon war, different in facts and calendar.
