New accelerators promise up to 4× better energy efficiency for LLM inference.
Silicon manufacturers announced specialized accelerators that promise up to 4× more tokens per watt versus the previous generation.
The improvement arrives as inference costs dominate budgets for LLM-powered products. Cloud providers are already preparing instances with the new chips for the fourth quarter.
Analysts expect competition to drive prices down and democratize access to large-scale models.
Per an internal memo reviewed by Reuters in July 2026, Meta planned to begin manufacturing its Iris accelerator from September within a four-generation MTIA program, with Broadcom on design and TSMC on fabrication. September coverage indicates production has started; infrastructure ambition is ~7 GW in 2026 and double (14 GW) in 2027, supplementing—not replacing—Nvidia and AMD GPUs.
On September 14, 2026, Forbes and RuntimeWire covered Cognichip’s enterprise launch of Artificial Chip Intelligence (ACI), founded by Faraj Aalaei. The system uses native physics-informed models—not LLM wrappers—for microarchitecture, RTL, verification and PPA; one cited case compressed a 55-page spec into days versus 4–5 months. Public evidence remains company and customer benchmarks.
Per Bloomberg (Sep 15) and TrendForce (Sep 16), Meta is testing MTIA 450 (Arke) for roughly H1 2027 deployment and preparing MTIA 500 (Astrid) for late 2027; Broadcom/TSMC inference chips, distinct from the Iris/14 GW story.